Atmel AVR AT90S8515-4 Spécifications télécharger pdf (Page 69)

69

AT90S8515

0841G–09/01

Figure 49. Port B Schematic Diagram (Pin PB5)

Figure 50. Port B Schematic Diagram (Pin PB6)

DATA BUS

D

D

Q

Q

RESET

RESET

C

C

WD

WP

RD

MOS

PULL-

UP

PB5

R

R

WP:

WD:

RL:

RP:

RD:

SPE:

MSTR

WRITE PORTB

WRITE DDRB

READ PORTB LATCH

READ PORTB PIN

READ DDRB

SPI ENABLE

MASTER SELECT

DDB5

PORTB5

SPE

MSTR

SPI MASTER

OUT

SPI SLAVE

IN

RL

RP

DATA BUS

D

D

Q

Q

RESET

RESET

C

C

WD

WP

RD

MOS

PULL-

UP

PB6

R

R

WP:

WD:

RL:

RP:

RD:

SPE:

MSTR

WRITE PORTB

WRITE DDRB

READ PORTB LATCH

READ PORTB PIN

READ DDRB

SPI ENABLE

MASTER SELECT

DDB6

PORTB6

SPE

MSTR

SPI SLAVE

OUT

SPI MASTER

IN

RL

RP

1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 111 112

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